4 Commits

Author	SHA1	Message	Date
Logic	395f5a1645	feat: add held-out validation and dual-decoder lewm imf	2026-04-17 19:26:56 +08:00
Logic	74f4963613	feat: add lewm-conditioned imf training and sigreg loss	2026-04-17 18:46:02 +08:00
Logic	ff7c9c1f2a	feat: add vision transfer backbones and IMF variants	2026-04-09 14:02:24 +08:00
Logic	d84bc6876e	feat(vla): align transformer training stack and rollout validation	2026-03-31 15:39:20 +08:00